Flash memory devices have undergone rapid development. Flash memory devices can store data for a considerably long time without powering, and have advantages such as high integration level, fast access, easy erasing, and rewriting. To further improve the bit density and reduce cost of flash memory devices, three-dimensional NAND flash memory devices have been developed.
A three-dimensional NAND flash memory device includes a stack of gate electrodes arranged over a substrate, with a plurality of semiconductor channels through and intersecting word lines, into the substrate. The bottom/lower gate electrodes function as bottom/lower selective gates. The top/upper gate electrodes function as top/upper selective gates. The word lines/gate electrodes between the top/upper selective gate electrodes and the bottom/lower gate electrodes function as word lines. The intersection of a word line and a semiconductor channel forms a memory cell. The top/upper selective gates are connected to word lines for row selection, and the bottom/lower selective gates are connected to bit lines for column selection.